**Digital Logic Design**

**Spring 2006**

** **

**Instructor:**
Dr. M. Bag-Mohammadi

**Email:**
mozafarb@ece.ut.ac.ir

**
Assistant: **Moslem Taheri** **

**Web log**: click
here

**Office Hours:**
Click here

**Text**:
*Digital Design* by Mano (3^{rd} Edition). The CD-ROM in the back
of the book contains a Verilog simulator as well as source code files for all
the examples in the book.

** Tutorial:
click here**

**Grade:
Digital Design;
Laboratory;**

**Goals**

Primary goals of the course are:

To introduce digital logic design. | |

Specific topics include: Binary systems, Boolean algebra, logic gates, analysis/design of combinatorial circuits, synchronous sequential logic, (If we had enough time we will look at registers, counters, and memory briefly).. |

To introduce laboratory experiments in digital circuits and logic design; students will construct and test basic digital circuits using standard integrated circuits (ICs). |

*
*

There will be 1 exam during the semester and a final exam at the end of the semester. | |

All exams will be |

Assignments are due seven days from the initial day of the assignment (i.e. the following Tuesday). | |

Late homework will be docked 50% per class period late, unless approved arrangements are made in advance. | |

All coursework must be
clear, legible, and have the | |

Cooperative group study on the homework is encouraged, but simply copying someone else's work is unethical and will leave you unprepared for exams. |

Topic |
Word File |
Solution |

Introduction: Binary Systems, Boolean Algebra and Logic Gates, Gate-Level Minimization | homework 1 | |

Combinatorial logic, decoder, multiplexer, Nand implementation |
homework 2 | page 1 2 3 |

Sequential circuit | homework 3 | |

Design of Sequential circuit | hw4n.doc |

Final grades in the course will be based on the following weighting distribution.

Homework……25% | |

Midterm 1…… 30% | |

Final Exam…..50% |

*Students are responsible
for their own learning*, through
reading and studying the text, reviewing the lectures, and working out the
homework problems. I strongly advise that you read the upcoming material before
it appears in lecture; the material will make much more sense that way.

Topic |
Chapter |
Lecture Note |

Introduction: Binary Systems | 1 | Lecture-1.ppt |

Boolean Algebra and Logic Gates |
2 | Lecture-2f.ppt, font |

Boolean Algebra and Logic Gates: Gate-Level Minimization |
3 | Lecture-3f.ppt |

Gate-Level Minimization |
3 | Lecture-4f.ppt |

Gate-Level Minimization, Combinational Logic |
4,3 | Lecture-5f.ppt |

Combinational Logic |
4 | Lecture-6f.ppt |

Combinational Logic |
4 | Lecture-7f.ppt |

Midterm 1 | 1,2,3,4 | midterm-06.doc |

Midterm 1 | 1,2,3,4 | midterm-06set2.doc |

Sequential circuit | 5 | Lecture-8f.ppt |

Sequential circuit | 5 | Lecture-9f.ppt |

Sequential circuit | 5 | Lecture-10f.ppt |

register | 6 | Lecture-11f.ppt |

counter | 6 | Lecture-12f.ppt |

Final |
5,6 | final-06.doc |